(1) Field of the Invention
This invention relates to a tunneling floating gate APS pixel and more particularly to advantageously using tunneling current in a thin oxide in pixel operation.
(2) Description of The Related Art
In a CMOS APS pixel structure having very thin gate oxides tunneling currents will occur through the gate oxide. These tunneling currents must be taken into account in the operation of these pixels.
U.S. Pat. No. 6,008,486. to Stam et al. describes a method for increasing effective integration time of an optical sensor. In some of the embodiments a floating diffusion is used in the operation of the pixel, however in one embodiment the floating diffusion is replaced by a floating gate.
U.S. Pat. No. 6,501,109 B1 to Chi describes an active pixel sensor cell formed in a semiconductor substrate utilizing a polysilicon floating gate.
U.S. Pat. No. 5,936,866 to Seitz describes a photoelectric semiconductor light-detection device with programmable dynamic performance. In at least one embodiment a floating gate, to which analog quantities of charge can be applied by tunneling currents, is used.
U.S. Pat. No. 6,350,979 B1 to Jing describes a CMOS image sensor having a floating gate with a comb structure.
U.S. Pat. No. 6,166,768 to Fossum et al. describes an active pixel sensor array, formed using CMOS integrated circuits, using floating gate pixels.
U.S. Pat. No. 5,608,243 to Chi et al. describes a split-gate MOS transistor active pixel sensor cell which utilizes a split gate.
U.S. Pat. No. 5,541,402 to Ackland et al. describes an imaging pixel which has a floating gate pixel node capable of nondestructive readout and source follower output circuitry.